Junior Layout Engineer [Code: LAIP-01]

Job Description:

  • Candidate will be responsible of physical implementation of Mixed Signal circuits
  • Candidate will work closely with design engineers in the custom layout, physical
    design and verification of high speed SerDes, PLL, CDR, LVDS and other mixed signal
    integrated circuits.
  • Candidate will plan the placement of major circuit components in an overall physical
    design.
  • Candidate will work on floor plan and power plan of Analog blocks and PHY
  • Candidate will perform LVS, DRC, DFM, and ERC using the physical verification tools.
  • Candidate will execute methodology checks using PERC
  • Candidate will help in automation of custom layout and porting using scripting
    languages.

Qualifications:

  • B.Sc. /M.Sc. in Electronics Engineering.
  • 0-4 Years of experience in custom IC layout techniques.
  • Knowledge in basic analog design techniques is essential
  • Familiar with EDA tools used in analog IC design
  • Oral and written fluency in English
  • Knowledge in Unix/Linux operating system is a plus
  • Knowledge in shell scripting/programming languages is a plus

Address

5 Mostafa Refaat St, First Floor,
Sheraton Buildings, Square 1135,
Heliopolis, Cairo 11361, Egypt.
Phone: (+2) 02.22.69.24.69
Fax: (+2) 02.22.69.25.35
Website: http://mipex.net
Email: info@mipex.net